12 Points: About High Frequency Circuit Board Layout

The rapid development of science and technology has decided that all enterprises should be upgraded, of which the circuit board depends on technology, naturally also must not lag behind, and thus the layout of high-frequency circuit board has become the key points that we need to explore when designing the circuit board high-frequency board. Today for you to organize the layout of high-frequency circuit board when you need to pay attention to the main points, TOPFAST with you to learn!

(1) High frequency circuits tend to have high integration and high density wiring. The use of multi-layer board is necessary for wiring, but also an effective means to reduce interference.

(2) The less lead bending between the pins of high-speed circuit devices, the better. The leads of high-frequency circuit wiring are preferably solid lines, which need to be wound and can be folded in 45° folded lines or arcs. To meet this requirement, the external transmission and mutual coupling of high-frequency signals can be reduced.

(3) The shorter the leads between the pins of the high-frequency circuit device, the better.

(4) The less the alternation between the wiring layers between the pins of the high-frequency circuit device, the better. By "minimize interlayer crossover", we mean the fewer vias used in the component connection process, it is estimated that one vias can bring about 0.5 pF of distributed capacitance. The number of vias is reduced. The speed can be greatly improved.

(5) High-frequency circuit wiring should pay attention to the parallel lines of signal lines introduced by "cross-talk". If parallel distribution can not be avoided, the parallel signal lines can be arranged in the back of a large area of "ground" to greatly reduce interference. Parallel lines in the same layer is almost unavoidable, but in the two adjacent layers, the direction of the lines must be perpendicular to each other.

(6) Grounding measures for enclosing particularly important signal lines or local units, i.e., drawing the outer contour of the selected object. With this function, the so-called "packet" processing can be performed automatically on the selected important signal lines. Of course, for high-speed systems, it is also useful to use this function for the local processing of components such as clocks.

(7) various types of signal lines can not form loops, and ground lines can not form current loops.

(8) A high-frequency decoupling capacitor should be placed near each IC block.

(9) The analog ground wire and digital ground wire should be connected to a common ground when using a high frequency turbulent link. In the actual assembly of high frequency turbulent chains, high frequency ferrite beads through the center hole are often used and are not usually represented in the circuit schematic, and the resulting netlist does not include such components, the wiring will ignore their presence. In response to this reality, it can be used as an inductor in the schematic and the component package is defined separately in the circuit board component library and manually moved to a suitable location near the convergence point of the common ground wire prior to wiring.

(10) Analog and digital circuits should be laid out separately. After independent wiring, power and ground should be connected at one point to avoid mutual interference.

(11) Before connecting the DSP off-chip program memory and data memory to the power supply, filter capacitors should be added and placed as close as possible to the chip power pins to filter out power supply noise. In addition, it is recommended to shield around the DSP and off-chip program memory and data memory to reduce external interference.

(12) Off-chip program memory and data memory should be placed as close as possible to the DSP chip. Also, the layout should be reasonable so that the length of data and address lines are essentially the same, especially when there are multiple memories in the system, the clock lines of each memory should be considered. Clock input distance is equal, or a separate programmable clock driver chip can be added. For DSP systems, an external memory with the same access speed as the DSP should be selected, otherwise the high-speed processing capability of the DSP will not be fully utilized. DSP instruction cycles are nanoseconds, so the most common problem in DSP hardware systems is high-frequency interference. Therefore, when making the printed circuit board (circuit board) of the DSP hardware system, special attention should be paid to the address and data lines. The signal lines should be wired correctly and reasonably. When wiring, try to make the high-frequency lines short and thick and keep them away from signal lines that are susceptible to interference, such as analog signal lines. When the circuitry around the DSP is more complex, it is recommended that the DSP and its clock circuit, reset circuit, off-chip program memory and data memory be formed into a minimal system to reduce interference.